Back-end Semiconductor Packaging In the CHIPS & Science Act

Back-end Semiconductor Packaging In the CHIPS & Science Act


  • Today, more than 80% of semiconductor packaging is completed in Asia, which poses significant national security risks to America’s supply.
  • No American company currently conducts high-volume packaging domestically.
  • The implementation of the CHIPS & Science Act must address back-end packaging of semiconductors, or congressional intent will not be met.

America has chosen, through our elected representatives in Congress, to invest $52 billion in our domestic semiconductor manufacturing sector through the CHIPS and Science Act, which subsidizes semiconductor manufacturing in the U.S. This policy, which was undertaken in the name of national security, must be done right, or we will miss the mark, give ground to our competitors, and waste taxpayer dollars. 

The National Institute of Standards and Technology (NIST), which is part of the Department of Commerce, has been chosen to stand up this new program—a tall order for an organization whose annual budget has hovered around $1 billion in recent years. However, early indications show that although they have a thoughtful approach to the structure of the program, including a mix of loans, loan guarantees, and grants, some of the stipulations attached to these funding streams are being used to advance an ESG agenda that will not help us compete with China.

Semiconductor manufacturing is not a straightforward process. For NIST to get this right, it is vital to understand the various steps to create a semiconductor from “soup to nuts.” The simplistic way to break down the manufacturing journey is into two distinct phases: front-end and back-end.

The front-end phase involves the processing of wafers in a fabrication facility or fab. The “guts” of the semiconductor chip are created during this process. Major industry players, like Intel, TSMC, and Samsung, are building fabs to produce these wafers. One such example is the often-touted $20 billion facility Intel is building in Ohio.

The second phase, or back-end, is what the industry calls packaging or assembly and testing. This is when the chip gets packaged into a usable format for the end-user, enabling use in the electronics we rely on. Assembly and testing are often referred to as OSAT or outsourced assembly and testing. In some industry circles, stakeholders say the real meaning is offshore assembly and testing.

As we all know, these quips often portray reality. In this case, the offshore reference is accurate. Currently, zero companies are doing high-volume packaging on American soil. More than 80% of all packaging worldwide is done in Asia.

In comparison, the Semiconductor Industry Association states that since the 1990s, the U.S. has accounted for nearly 50% of the global front-end production of chips.

After each semiconductor wafer is “fabbed,” nearly all of these chips, still in wafer form, are shipped offshore to China, Taiwan, Malaysia, or South Korea (largely) for packaging and testing. This introduces a great deal of strategic risk into the supply chain. While offshore, the chips could be manipulated, corrupted, or counterfeited during the back-end phase if we continue to depend on them for OSAT. We cannot secure our supply chain without developing these competencies here in America.

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